Senior Principal Engineer, Memory Architect

Senior Principal Engineer, Memory Architect for leading Chip Company in Sunnyvale, CAResponsibilities

• Work with marketing and system architects to define leading-edge serial memory buffer products
• Write detailed chip architecture specifications
• Identify and select IP blocks, working with both internal design teams and external vendors
• Work with silicon design, verification, and validation teams to guide successful product implementation

• Silicon device architecture expertise in the following areas:
• PCIe 5.0 transaction, data link, and physical layers - PCIe 5.0 software stack / driver experience is a plus
• CXL 2.0 io, cache, and memory protocols
• High-performance on-chip interconnect - switch architecture knowledge is a plus
• DDR5 memory controller and PHY
• Embedded management processors
• Experience selecting and integrating silicon IP for the architectural areas listed above
• Experience writing detailed architecture specifications for complex silicon devices