21 Apr
ASIC Design Verification Staff Engineer
Vacancy expired!
ACS solutions has an immediate need for a
ASIC Design Verification Staff Engineer with experience of Silicon Industry. This is a long term contract opportunity and is in Menlo Park CA Our client is a leading Multinational Technology company.Please review the job description below:Top Skills: ASIC, Verilog, RTL, SoC, API, verification Responsibilities:- Testbench development - System Verilog UVM and C tests Integration/development of C tests/APIs and SW build flow Integration/development of UVM mailboxes and HW/SW communication components Integration of lower level UVM testbenches
- Test plan development Power Aware testbench development and simulations Seamless porting between simulation/emulation/prototyping platforms
- Regression setup and debug for RTL/Gate Level Netlist/UPF PA sim/Emulation/Proto Coverage collection and closure Working with cross functional teams (DV/Arch/Design/FW) to identify coverage scope
- 5+ years of experience in RTL Design and Verification area of which 2+ years of experience in SoC Design Verification and HW/SW verification Deep knowledge of System Verilog UVM and vertical tetsbench integration
- Knowledge of low level HW/SW interaction and debug Knowledge of multi CPU and debug architectures
- Experience with development of fully automated flows
Vacancy expired!